搜索资源列表
aes_core
- AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use,
subbyte128
- AES算法中Sbox映射Verilog源代码，采用一一映射的方案，用查找表的方式实现Sbox。转换数据长度为128bit。-Sbox mapping Verilog source code of the AES algorithm, using one to one mapping of the program, using a lookup table to achieve the Sbox table. Convert the data length is 128bit.
AES_verilog
- 对AES算法加密解密的Verilog源代码，可以实现其128位和256位明文密文之间的转换。-AES algorithm for encryption and decryption of Verilog source code, can achieve the conversion of its 128 and 256 between the plaintext ciphertext.
aes
- contains AES doc with code in Verilog
AES
- AES的加密解密verilog全部源代码-AES encryption and decryption verilog full source code
aes__code_based_on_verilog
- AES核心代码，用verilog写的，可供参考-aes core code using verilog for learning
aes
- 使用verilog的128位aes加密源程序-Use verilog of 128 aes encryption source code
apbtoaes128_latest.tar
- AES加密算法verilog代码实现，基于APB总线接口数字IP，包含详细的testbench-AES encryption algorithm verilog code, based on the APB bus interface digital IP, contains a detailed testbench
aes_thesis_v1.0
- aes code in verilog vhdl language which is very useful.
aes128-hdl-master
- Verilog AES hdl key 128 bit code and decode